20.PCI代码导读-1.LSPCI源码及使用-《计算机知识》

admin 2025-11-02 22:25:13 系统网络 来源:ZONE.CI 全球网 0 阅读模式
  • Pciutils源码分析
    • lspci
      • 如何使用
      • 源码包编译
      • 代码流程分析
      • 获取pci详细信息
      • lspci -t 的解析(重点,也可通过sysfs进行查看,更直观)
    • setpci 修改配置空间
    • 实战应用
    • 附录:提供两个查看PCI得工具

    Pciutils源码分析

    lspci是Linux下分析PCI设备的神器,简单分析下实现原理

    源码下载: pciutils-3.7.0 或 github下载

    pciutils提供了三种常用的工具:

    • lspci: displays detailed information about all PCI buses and devices. 查看PCI设备的信息

    • setpci: allows to read from and write to PCI device configuration registers. For example, you can adjust the latency timers with it. CAUTION: There is a couple of dangerous points and caveats, please read the manual page first! 允许读写PCI配置空间

    • update-pciids: download the current version of the pci.ids file. 更新最新版本的pci.ids文档 // /usr/share/misc/pci.ids 前边描述了已知设备得vendor ID和DeviceID 后边(List of known device classes, subclasses and programming interfaces) 描述了 class code组成方式

    lspci

    如何使用

    其实最常用得办法就是查看配置空间

    1. lspci | grep xxxx # 来查找设备得BDF号,grep是用来过滤其他设备, xxx可以是device号,也可以是Classcode对应类型设备
    2. (base) baiy@inno-MS-7B89:driver-test$ lspci | grep 1480
    3. 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1480
    4. (base) baiy@inno-MS-7B89:driver-test$ sudo lspci -s 28:00.1 -xxxxvvvv # 用root用户来查看设备所有得配置空间详情
    5. 28:00.1 Encryption controller: Advanced Micro Devices, Inc. [AMD] Device 1486
    6. Subsystem: Micro-Star International Co., Ltd. [MSI] Device 7b89
    7. Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    8. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort+ <TAbort- <MAbort- >SERR- <PERR- INTx-
    9. Latency: 0, Cache Line Size: 64 bytes
    10. Interrupt: pin A routed to IRQ 90
    11. Region 2: Memory at f7300000 (32-bit, non-prefetchable) [size=1M]
    12. Region 5: Memory at f7408000 (32-bit, non-prefetchable) [size=8K]
    13. Capabilities: [48] Vendor Specific Information: Len=08 <?>
    14. Capabilities: [50] Power Management version 3
    15. Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
    16. Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=0 PME-
    17. Capabilities: [64] Express (v2) Endpoint, MSI 00
    18. DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <4us, L1 unlimited
    19. ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset+ SlotPowerLimit 0.000W
    20. DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
    21. RlxdOrd+ ExtTag+ PhantFunc- AuxPwr- NoSnoop+ FLReset-
    22. MaxPayload 256 bytes, MaxReadReq 512 bytes
    23. DevSta: CorrErr+ UncorrErr- FatalErr- UnsuppReq+ AuxPwr- TransPend-
    24. LnkCap: Port #0, Speed 16GT/s, Width x16, ASPM L0s L1, Exit Latency L0s <64ns, L1 <1us
    25. ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp+
    26. LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- CommClk+
    27. ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
    28. LnkSta: Speed 16GT/s, Width x16, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
    29. DevCap2: Completion Timeout: Range ABCD, TimeoutDis+, LTR-, OBFF Not Supported
    30. DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR-, OBFF Disabled
    31. LnkSta2: Current De-emphasis Level: -3.5dB, EqualizationComplete-, EqualizationPhase1-
    32. EqualizationPhase2-, EqualizationPhase3-, LinkEqualizationRequest-
    33. Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+
    34. Address: 0000000000000000 Data: 0000
    35. Capabilities: [c0] MSI-X: Enable+ Count=2 Masked-
    36. Vector table: BAR=5 offset=00000000
    37. PBA: BAR=5 offset=00001000
    38. Capabilities: [100 v1] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?>
    39. Capabilities: [150 v2] Advanced Error Reporting
    40. UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    41. UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
    42. UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
    43. CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    44. CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
    45. AERCap: First Error Pointer: 00, GenCap- CGenEn- ChkCap- ChkEn-
    46. Capabilities: [2a0 v1] Access Control Services
    47. ACSCap: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
    48. ACSCtl: SrcValid- TransBlk- ReqRedir- CmpltRedir- UpstreamFwd- EgressCtrl- DirectTrans-
    49. Capabilities: [370 v1] Transaction Processing Hints
    50. Device specific mode supported
    51. Steering table in TPH capability structure
    52. Kernel driver in use: ccp
    53. Kernel modules: ccp
    54. 00: 22 10 86 14 06 04 10 08 00 00 80 10 10 00 80 00
    55. 10: 00 00 00 00 00 00 00 00 00 00 30 f7 00 00 00 00
    56. ......
    1. baiy@ubuntu:pcie-test$ lspci -h
    2. Basic display modes:
    3. -mm Produce machine-readable output (single -m for an obsolete format)
    4. -t Show bus tree
    5. Display options:
    6. -v Be verbose (-vv for very verbose)
    7. -k Show kernel drivers handling each device
    8. -x Show hex-dump of the standard part of the config space
    9. -xxx Show hex-dump of the whole config space (dangerous; root only)
    10. -xxxx Show hex-dump of the 4096-byte extended config space (root only)
    11. -b Bus-centric view (addresses and IRQ's as seen by the bus)
    12. -D Always show domain numbers
    13. Resolving of device ID's to names:
    14. -n Show numeric ID's
    15. -nn Show both textual and numeric ID's (names & numbers)
    16. -q Query the PCI ID database for unknown ID's via DNS
    17. -qq As above, but re-query locally cached entries
    18. -Q Query the PCI ID database for all ID's via DNS
    19. Selection of devices:
    20. -s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]] Show only devices in selected slots
    21. -d [<vendor>]:[<device>][:<class>] Show only devices with specified ID's
    22. Other options:
    23. -i <file> Use specified ID database instead of /usr/share/misc/pci.ids.gz
    24. -p <file> Look up kernel modules in a given file instead of default modules.pcimap
    25. -M Enable `bus mapping' mode (dangerous; root only)
    26. PCI access options:
    27. -A <method> Use the specified PCI access method (see `-A help' for a list)
    28. -O <par>=<val> Set PCI access parameter (see `-O help' for a list)
    29. -G Enable PCI access debugging
    30. -H <mode> Use direct hardware access (<mode> = 1 or 2)
    31. -F <file> Read PCI configuration dump from a given file

    源码包编译

    :配置文件只需要看 lib/config.h即可

    1. # 编译过程
    2. make 即可
    3. # 配置过程
    4. Makefile会调用
    5. lib/config.h lib/config.mk:
    6. cd lib && ./configure
    7. lib/configure会将当前所支持的配置写入到lib/config.h中

    代码流程分析

    1. main // lspci.c
    2. pacc = pci_alloc(); // ***分配自己的struct pci_access,也会初始化param表
    3. pci_methods
    4. pm_linux_sysfs
    5. sysfs_config(pacc) // 这里吧所有支持方法的访问目录方式存在parm list,然后遍历
    6. // 在访问时,通过 sysfs_name(a)获取根目录
    7. // lib/configure:73:echo >>$c '#define PCI_PATH_SYS_BUS_PCI "/sys/bus/pci"'
    8. getopt(argc, argv, options) // 解析参数
    9. pci_init(pacc); // 初始化方法
    10. pci_init_v35(pacc); // 初始化方法表: 解析pci_methods 使用哪个接口
    11. scan_devices(); // 扫描所有设备 // sysfs_scan
    12. sort_them(); // 快速排序
    13. show(); // 显示
    14. show_kernel_cleanup();
    15. pci_cleanup(pacc);
    16. 解析参数中 -A,-O,-G等PCI access options参数:
    17. default分支:
    18. parse_generic_option(i, pacc, optarg) // 解析即可
    19. ### 初始化方法接口
    20. pci_init(pacc);
    21. pci_init_v35(struct pci_access *a) //init.c
    22. // *** 获取pci接口,PCI_ACCESS_SYS_BUS_PCI=1,使用pci_methods->pm_linux_sysfs
    23. struct pci_methods *m = pci_methods[probe_sequence[i]]; // ***获取方法
    24. pm_linux_sysfs->detect(); // 检查sysfs是否存在
    25. pm_linux_sysfs->init(); //a->methods->init(a);功能:清空未使用的变量
    26. // ******所以全局的操作方法接口使用如下**** !!!
    27. struct pci_methods pm_linux_sysfs = {
    28. "linux-sysfs", // name接口
    29. "The sys filesystem on Linux", // help接口
    30. sysfs_config, // config接口
    31. sysfs_detect, // detect接口
    32. sysfs_init, // init接口
    33. sysfs_cleanup, // cleanup接口
    34. sysfs_scan, // scan接口
    35. sysfs_fill_info, // fill_info接口
    36. sysfs_read, // read接口
    37. sysfs_write, // write接口
    38. sysfs_read_vpd, // read_vpd接口
    39. NULL, /* init_dev */ // init_dev接口
    40. sysfs_cleanup_dev // cleanup_dev接口
    41. };
    42. # 注: opt_map_mode暂时不考虑,help里边说有风险
    43. ### 扫描设备接口
    44. scan_devices
    45. sysfs_scan
    46. // sysfs_config中获取的目录索引,然后查询dir
    47. snprintf(dirname, sizeof(dirname), "%s/devices", sysfs_name(a));
    48. while ((entry = readdir(dir))){
    49. d = pci_alloc_dev(a); // 分配dev,并初始化
    50. pci_link_dev(a, d);
    51. (struct pci_access *)a->devices = d, 弄成链表,然后前插
    52. }
    53. for (p=pacc->devices; p; p=p->next) // 遍历
    54. scan_device(p)
    55. pci_read_block(p, 0, d->config, 64) # 预读取配置空间
    56. sysfs_read
    57. do_read(d, fd, buf, len, pos);
    58. syscall(SYS_pread, fd, buf, size, where); // 调用系统调用,有点意思的操作方法 !!!!

    获取厂家信息:从pci.ids中进行对比,来查找厂家信息和设备信息。 pci的id表收录在 pci-ids.ucw.cz 中

    PCI ID Project at The PCI ID Repository, 注册登陆后(公司是PCI-SIG组织成员),可以增加修改对应device id的描述信息,需要maintainer审批合入后,展示在PCI ID网站上 sudo update-pciids 命令可以更新pci.ids 在此位置/usr/share/misc/pci.ids可以查看更新后pci.ids文件

    1. baiy@inno-NUC8i3BEH:pciutils-3.7.0$ sudo ./lspci -s 00:02.0 -m
    2. opt_machine is 1, verbose is 0
    3. 00:02.0 "VGA compatible controller" "Intel Corporation" "Device 3ea5" -r01 "Intel Corporation" "Device 2074"
    4. baiy@inno-NUC8i3BEH:pciutils-3.7.0$ sudo ./lspci -s 00:02.0 -mv
    5. opt_machine is 1, verbose is 1
    6. Device: 00:02.0
    7. Class: VGA compatible controller
    8. Vendor: Intel Corporation
    9. Device: Device 3ea5
    10. SVendor: Intel Corporation
    11. SDevice: Device 2074
    12. Rev: 01
    13. show
    14. show_device(d);
    15. show_machine(d); // verbose就是 -vvv中v的数量

    获取pci详细信息

    1. show
    2. show_device(d);
    3. show_verbose(d); // verbose就是 -vvv中v的数量
    1. opt_machine is 0, verbose is 3
    2. 00:02.0 VGA compatible controller: Intel Corporation Device 3ea5 (rev 01) (prog-if 00 [VGA controller])
    3. DeviceName: CPU
    4. Subsystem: Intel Corporation Device 2074
    5. Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    6. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    7. Latency: 0, Cache Line Size: 64 bytes
    8. Interrupt: pin A routed to IRQ 132
    9. Region 0: Memory at 90000000 (64-bit, non-prefetchable) [size=16M]
    10. Region 2: Memory at 80000000 (64-bit, prefetchable) [size=256M]
    11. Region 4: I/O ports at 3000 [size=64]
    12. Expansion ROM at 000c0000 [virtual] [disabled] [size=128K]
    13. Capabilities: [40] Vendor Specific Information: Len=0c <?>
    14. Capabilities: [70] Express (v2) Root Complex Integrated Endpoint, MSI 00
    15. DevCap: MaxPayload 128 bytes, PhantFunc 0
    16. ExtTag- RBE+ FLReset+
    17. DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
    18. RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- FLReset-
    19. MaxPayload 128 bytes, MaxReadReq 128 bytes
    20. DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr- TransPend-
    21. DevCap2: Completion Timeout: Not Supported, TimeoutDis- NROPrPrP- LTR-
    22. 10BitTagComp- 10BitTagReq- OBFF Not Supported, ExtFmt- EETLPPrefix-
    23. EmergencyPowerReduction Not Supported, EmergencyPowerReductionInit-
    24. FRS-
    25. AtomicOpsCap: 32bit- 64bit- 128bitCAS-
    26. DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis- LTR- OBFF Disabled,
    27. AtomicOpsCtl: ReqEn-
    28. Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit-
    29. Address: fee00018 Data: 0000
    30. Capabilities: [d0] Power Management version 2
    31. Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
    32. Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
    33. Capabilities: [100 v1] Process Address Space ID (PASID)
    34. PASIDCap: Exec- Priv-, Max PASID Width: 14
    35. PASIDCtl: Enable- Exec- Priv-
    36. Capabilities: [200 v1] Address Translation Service (ATS)
    37. ATSCap: Invalidate Queue Depth: 00
    38. ATSCtl: Enable-, Smallest Translation Unit: 00
    39. Capabilities: [300 v1] Page Request Interface (PRI)
    40. PRICtl: Enable- Reset-
    41. PRISta: RF- UPRGI- Stopped+
    42. Page Request Capacity: 00008000, Page Request Allocation: 00000000
    43. Kernel driver in use: i915
    44. Kernel modules: i915

    lspci -t 的解析(重点,也可通过sysfs进行查看,更直观)

    以下边为例,来详解一个lspci 的树形结构

    1. # 其实真没有下边这个直观
    2. (base) baiy@inno-MS-7B89:~$ tree /sys/bus/pci/devices/
    3. /sys/bus/pci/devices/
    4. ├── 0000:00:00.0 -> ../../../devices/pci0000:00/0000:00:00.0
    5. ├── 0000:00:00.2 -> ../../../devices/pci0000:00/0000:00:00.2
    6. ├── 0000:00:01.0 -> ../../../devices/pci0000:00/0000:00:01.0
    7. ├── 0000:00:01.1 -> ../../../devices/pci0000:00/0000:00:01.1
    8. ├── 0000:00:01.3 -> ../../../devices/pci0000:00/0000:00:01.3
    9. ├── 0000:00:02.0 -> ../../../devices/pci0000:00/0000:00:02.0
    10. ├── 0000:00:03.0 -> ../../../devices/pci0000:00/0000:00:03.0
    11. ├── 0000:00:03.1 -> ../../../devices/pci0000:00/0000:00:03.1
    12. ├── 0000:00:04.0 -> ../../../devices/pci0000:00/0000:00:04.0
    13. ├── 0000:00:05.0 -> ../../../devices/pci0000:00/0000:00:05.0
    14. ├── 0000:00:07.0 -> ../../../devices/pci0000:00/0000:00:07.0
    15. ├── 0000:00:07.1 -> ../../../devices/pci0000:00/0000:00:07.1
    16. ├── 0000:00:08.0 -> ../../../devices/pci0000:00/0000:00:08.0
    17. ├── 0000:00:08.1 -> ../../../devices/pci0000:00/0000:00:08.1
    18. ├── 0000:00:08.2 -> ../../../devices/pci0000:00/0000:00:08.2
    19. ├── 0000:00:08.3 -> ../../../devices/pci0000:00/0000:00:08.3
    20. ├── 0000:00:14.0 -> ../../../devices/pci0000:00/0000:00:14.0
    21. ├── 0000:00:14.3 -> ../../../devices/pci0000:00/0000:00:14.3
    22. ├── 0000:00:18.0 -> ../../../devices/pci0000:00/0000:00:18.0
    23. ├── 0000:00:18.1 -> ../../../devices/pci0000:00/0000:00:18.1
    24. ├── 0000:00:18.2 -> ../../../devices/pci0000:00/0000:00:18.2
    25. ├── 0000:00:18.3 -> ../../../devices/pci0000:00/0000:00:18.3
    26. ├── 0000:00:18.4 -> ../../../devices/pci0000:00/0000:00:18.4
    27. ├── 0000:00:18.5 -> ../../../devices/pci0000:00/0000:00:18.5
    28. ├── 0000:00:18.6 -> ../../../devices/pci0000:00/0000:00:18.6
    29. ├── 0000:00:18.7 -> ../../../devices/pci0000:00/0000:00:18.7
    30. ├── 0000:01:00.0 -> ../../../devices/pci0000:00/0000:00:01.1/0000:01:00.0
    31. ├── 0000:03:00.0 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.0
    32. ├── 0000:03:00.1 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.1
    33. ├── 0000:03:00.2 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.2
    34. ├── 0000:20:00.0 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.2/0000:20:00.0
    35. ├── 0000:20:01.0 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.2/0000:20:01.0
    36. ├── 0000:20:04.0 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.2/0000:20:04.0
    37. ├── 0000:22:00.0 -> ../../../devices/pci0000:00/0000:00:01.3/0000:03:00.2/0000:20:01.0/0000:22:00.0
    38. ├── 0000:26:00.0 -> ../../../devices/pci0000:00/0000:00:03.1/0000:26:00.0
    39. ├── 0000:26:00.1 -> ../../../devices/pci0000:00/0000:00:03.1/0000:26:00.1
    40. ├── 0000:27:00.0 -> ../../../devices/pci0000:00/0000:00:07.1/0000:27:00.0
    41. ├── 0000:28:00.0 -> ../../../devices/pci0000:00/0000:00:08.1/0000:28:00.0
    42. ├── 0000:28:00.1 -> ../../../devices/pci0000:00/0000:00:08.1/0000:28:00.1
    43. ├── 0000:28:00.3 -> ../../../devices/pci0000:00/0000:00:08.1/0000:28:00.3
    44. ├── 0000:28:00.4 -> ../../../devices/pci0000:00/0000:00:08.1/0000:28:00.4
    45. ├── 0000:30:00.0 -> ../../../devices/pci0000:00/0000:00:08.2/0000:30:00.0
    46. └── 0000:31:00.0 -> ../../../devices/pci0000:00/0000:00:08.3/0000:31:00.0
    47. (base) baiy@inno-MS-7B89:~$ lspci
    48. 00:00.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1480
    49. 00:00.2 IOMMU: Advanced Micro Devices, Inc. [AMD] Device 1481
    50. 00:01.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    51. 00:01.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1483
    52. 00:01.3 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1483
    53. 00:02.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    54. 00:03.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    55. 00:03.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1483
    56. 00:04.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    57. 00:05.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    58. 00:07.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    59. 00:07.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1484
    60. 00:08.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1482
    61. 00:08.1 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1484
    62. 00:08.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1484
    63. 00:08.3 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 1484
    64. 00:14.0 SMBus: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller (rev 61)
    65. 00:14.3 ISA bridge: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge (rev 51)
    66. 00:18.0 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1440
    67. 00:18.1 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1441
    68. 00:18.2 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1442
    69. 00:18.3 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1443
    70. 00:18.4 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1444
    71. 00:18.5 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1445
    72. 00:18.6 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1446
    73. 00:18.7 Host bridge: Advanced Micro Devices, Inc. [AMD] Device 1447
    74. 01:00.0 Non-Volatile memory controller: Sandisk Corp Device 5006
    75. 03:00.0 USB controller: Advanced Micro Devices, Inc. [AMD] Device 43d5 (rev 01)
    76. 03:00.1 SATA controller: Advanced Micro Devices, Inc. [AMD] Device 43c8 (rev 01)
    77. 03:00.2 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43c6 (rev 01)
    78. 20:00.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43c7 (rev 01)
    79. 20:01.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43c7 (rev 01)
    80. 20:04.0 PCI bridge: Advanced Micro Devices, Inc. [AMD] Device 43c7 (rev 01)
    81. 22:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 15)
    82. 26:00.0 VGA compatible controller: NVIDIA Corporation Device 1f82 (rev a1)
    83. 26:00.1 Audio device: NVIDIA Corporation Device 10fa (rev a1)
    84. 27:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device 148a
    85. 28:00.0 Non-Essential Instrumentation [1300]: Advanced Micro Devices, Inc. [AMD] Device 1485
    86. 28:00.1 Encryption controller: Advanced Micro Devices, Inc. [AMD] Device 1486
    87. 28:00.3 USB controller: Advanced Micro Devices, Inc. [AMD] Device 149c
    88. 28:00.4 Audio device: Advanced Micro Devices, Inc. [AMD] Device 1487
    89. 30:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
    90. 31:00.0 SATA controller: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] (rev 51)
    91. (base) baiy@inno-MS-7B89:~$ lspci -t
    92. -[0000:00]-+-00.0
    93. +-00.2
    94. +-01.0
    95. +-01.1-[01]----00.0
    96. +-01.3-[03-25]--+-00.0
    97. | +-00.1
    98. | \-00.2-[20-25]--+-00.0-[21]--
    99. | +-01.0-[22]----00.0
    100. | \-04.0-[25]--
    101. +-02.0
    102. +-03.0
    103. +-03.1-[26]--+-00.0
    104. | \-00.1
    105. +-04.0
    106. +-05.0
    107. +-07.0
    108. +-07.1-[27]----00.0
    109. +-08.0
    110. +-08.1-[28]--+-00.0
    111. | +-00.1
    112. | +-00.3
    113. | \-00.4
    114. +-08.2-[30]----00.0
    115. +-08.3-[31]----00.0
    116. +-14.0
    117. +-14.3
    118. +-18.0
    119. +-18.1
    120. +-18.2
    121. +-18.3
    122. +-18.4
    123. +-18.5
    124. +-18.6
    125. \-18.7

    setpci 修改配置空间

    可以用来修改配置空间参考: setpci

    1. sudo setpci -s 00:02.0 F4.B=FF
    2. setpci 是修改设备属性的命令。
    3. -s 表示接下来输入的是设备的地址。
    4. 00:02.0 VGA设备地址(<总线>:<接口>.<功能>)。
    5. F4 要修改的属性的地址,这里应该表示“亮度”。
    6. .B 修改的长度(B应该是字节(Byte),还有w(应该是Word,两个字节)、L(应该是Long,4个字节))。
    7. =FF 要修改的值(可以改)
    8. (base) baiy@inno-MS-7B89:Linux-kernel-test$ sudo setpci -s 26:00.0 04.W=0407
    9. (base) baiy@inno-MS-7B89:Linux-kernel-test$ lspci -s 26:00.0 -xxxvvv
    10. 26:00.0 VGA compatible controller: NVIDIA Corporation Device 1f82 (rev a1) (prog-if 00 [VGA controller])
    11. Subsystem: Micro-Star International Co., Ltd. [MSI] Device 8d92
    12. Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    13. Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- INTx-
    14. Latency: 0, Cache Line Size: 64 bytes
    15. Interrupt: pin A routed to IRQ 94
    16. Region 0: Memory at f6000000 (32-bit, non-prefetchable) [size=16M]
    17. Region 1: Memory at e0000000 (64-bit, prefetchable) [size=256M]
    18. Region 3: Memory at f0000000 (64-bit, prefetchable) [size=32M]
    19. Region 5: I/O ports at e000 [size=128]
    20. Expansion ROM at 000c0000 [disabled] [size=128K]
    21. Capabilities: <access denied>
    22. Kernel driver in use: nouveau
    23. Kernel modules: nvidiafb, nouveau
    24. 00: de 10 82 1f 07 04 10 40 a1 00 00 03 10 00 80 00
    25. 10: 00 00 00 f6 0c 00 00 e0 00 00 00 00 0c 00 00 f0
    26. 20: 00 00 00 00 01 e0 00 00 00 00 00 00 62 14 92 8d
    27. 30: 00 00 00 f7 60 00 00 00 00 00 00 00 0a 01 00 00

    实战应用

    在我测试时,遇到过一个任务:HotReset 一个设备,怎么办?

    通过前边,我们知道: 7.5.1.3.13 Bridge Control Register (Offset 3Eh) 中的 Secondary Bus Reset 位 写1 可以使用Host Rset(PCI总线,使用RST#信号复位, PCIE设备使用TS1和TS2序列对下游设备进行Host Rset)

    那么只需要lspci -t 找到设备所在的switch上,使用setpci命令将Secondary Bus Reset进行复位即可。

    附录:提供两个查看PCI得工具

    推荐两个实用的PCIe工具软件

    1. Mindshare ArborMindshare是一家专业的第三方硬件系统培训公司,主要方向为PCI Express、M-PCIe、NVMe、USB、ARM Architecture、DDRx/LPDDRx、Intel Haswell/Broadell、Intel Mobile Platform and SoC、x86 Architecture、HyperTransport、PCI/PCI-X、SAS Storage、SATA Storage、ISA System、InfiniBand Network Architecture、x86 Firmware:UEFI and BIOS和OpenCL等内容。该公司还出版过多本相关内容的书籍:https://www.mindshare.com/Books/Books_*_eBooksArbor是该公司开发的一款调试软件,主要用于PCI/PCI-X/PCIe/Hyper Transport系统的分析与调试。支持主流的Windows和Linux系统:https://www.mindshare.com/software/?section=132B0BA21710用户可以在以上链接免费下载该软件,并有14天的免费试用期,试用期结束后,调试分析功能将被锁定,但是PCI/PCIe Configuration Space查阅功能仍然可以正常使用。该功能实际上就是把PCI/PCIe Spec的相关内容做成了一个软件,方便设计者快速地查找Configuration Space中的每个寄存器的意义和使用方法,如下图所示:1.LSPCI源码及使用 - 图12. Teledyne LeCroy TeleScan PE**Teledyne LeCroy TeleScan PE是与LeCroy的PCIe协议分析仪配套的软件套件中的一部分,和Arbor一样,该软件也同时支持主流的Windows和Linux系统。大家可以在LeCroy的官网上免费下载,并免费使用:https://teledynelecroy.com/protocolanalyzer/pci-express/telescan-pe-software/resources/analysis-softwareTeleScan PE刚好提供了Arbor需要付费才能使用的那部分功能:用户可以通过TeleScan PE来扫描系统中的PCI/PCIe设备,并提供了读写其配置空间中的寄存器的功能。TeleScan PE软件的用户界面截图如下图所示:1.LSPCI源码及使用 - 图2

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